Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
Semiconductor devices exploit the electrical properties of semiconductor materials. The atomic structure of semiconductor material allows its electrical conductivity to be manipulated by the application of an electric field or base current or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.
A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed calculations and other useful functions.
Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each semiconductor die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual semiconductor die from the finished wafer and packaging the die to provide structural support and environmental isolation. The term “semiconductor die” as used herein refers to both the singular and plural form of the words, and accordingly, can refer to both a single semiconductor device and multiple semiconductor devices.
One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices have a smaller footprint, which is desirable for smaller end products. A smaller semiconductor die size can be achieved by improvements in the front-end process resulting in semiconductor die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint by improvements in electrical interconnection and packaging materials.
One common technique of interconnecting a semiconductor die with a printed circuit board (PCB) or other substrate involves the use of bumps. FIG. 1 illustrates a conventional semiconductor device 10 with flipchip type semiconductor die 12 having an active surface 14 and contact pads 16 formed over active surface 14. An insulating or passivation layer 18 is formed over active surface 14 and contact pads 16. A portion of insulating layer 18 is removed to expose contact pads 16. An electrically conductive layer 20 is conformally applied over the exposed contact pads 16 and insulating layer 18. Conductive layer 20 operates as an under bump metallization (UBM) layer electrically connected to contact pads 16. A conductive bump material 22 is deposited over conductive layer 20.
A substrate or PCB 24 has one or more conductive layers 26 operating as conductive traces or contact pads. An insulating or passivation layer 28 is formed over conductive layer 26. A portion of insulating layer 28 is removed to expose conductive layer 26. A conductive pre-solder or bump material 29 is deposited over the exposed conductive layer 26. Semiconductor die 12 is positioned over and mounted to substrate 24 using a pick and place operation with active surface 14 oriented toward substrate 24. Bumps 22 and 29 are reflowed and merge to form a bump interconnect structure mechanically and electrically connecting semiconductor die 12 to conductive layer 26 of substrate 24.
FIG. 2 illustrates another conventional semiconductor device with flipchip type semiconductor die 12 having an active surface 14 and contact pads 16 formed over active surface 14. An insulating or passivation layer 18 is formed over active surface 14 and contact pads 16. A portion of insulating layer 18 is removed to expose contact pads 16. An electrically conductive layer 20 is conformally applied over the exposed contact pads 16 and insulating layer 18. Conductive layer 20 operates as a UBM layer electrically connected to contact pads 16. A conductive pillar 30 is formed over conductive layer 20. A conductive bump material 32 is deposited over conductive pillar 30.
A substrate or PCB 34 has one or more conductive layers 36 operating as conductive traces or contact pads. An insulating layer 38 is formed over conductive layer 36. A portion of insulating layer 38 is removed to expose conductive layer 36. A pre-solder or bump material 40 is deposited over conductive layer 36. Semiconductor die 12 is positioned over and mounted to substrate 34 using a pick and place operation with active surface 14 and conductive pillars 30 oriented toward the substrate. Bumps 32 and 40 are reflowed and merge to form a bump interconnect structure mechanically and electrically connecting conductive pillars 30 and semiconductor die 12 to conductive layer 36 of substrate 34.
In each case of FIGS. 1-2, the bump interconnect structure is susceptible to de-wetting of the UBM layer and exhibits weak joints and reliability problems. For example, semiconductor die 12 has a problem with delamination or damage of the extremely-low dielectric constant (ELK) interlayer dielectric layer (ILD) around the bump area. When the semiconductor wafer is subjected to thermal or mechanical stress, the ELK ILD delamination or damage can occur which causes defects in the semiconductor die. Similarly, semiconductor die 12 is subject to pre-solder cracking at the junction with the substrate. The incidence of pre-solder cracking and ELK delamination reduces reliability and manufacturing yield, and increases cost.